MACHINE LEARNING-INSPIRED HIGH-PERFORMANCE AND ENERGY-EFFICIENT HETEROGENEOUS MANYCORE CHIP DESIGN

Wonje Choi

CPU-GPU based heterogeneous manycore architecture is expected to be the dominant computing platform for many emerging application domains including artificial intelligence, bio-computing and big data analytics. This heterogeneous system typically consists of multiple CPU cores, many GPU cores and a few shared Last-Level-Cache (LLC) units and exhibit challenging on-chip traffic patterns with various QoS requirements. The on-chip communication architecture for heterogeneous manycore systems should be designed such that it efficiently handles the various traffic requirement simultaneously. With the incorporation of different types (CPUs, GPUs, accelerators, etc.) of cores, it becomes more difficult to efficiently explore the combinatorial design space of heterogeneous systems. In order to uncover high-quality designs, new methods need to be developed that can quickly search the design space with ever increasing system size. Aside from on-chip communication architecture, the design of heterogeneous manycore platforms is dominated by power and thermal constraints. In this respect, voltage–frequency island (VFI) is a promising design paradigm to create scalable energy-efﬁcient platforms. By dynamically tailoring the voltage and frequency of each island, we can further improve the energy savings within given performance constraints. Traditional DVFS techniques operate on a core-by-core basis and use core-level information (e.g., core utilization and communication) to tailor the V/F values of each individual core. These traditional DVFS techniques were applied using the combined information from all cores within the VFI, i.e., the VFI’s average core utilization and communication. However, simple averages may not capture the information required to accommodate every core, router, and link within a VFI, particularly for VFIs with large intra-VFI workload variance. In this dissertation, we undertake above-mentioned problems of designing efficient heterogenous manycore architectures. First, we propose a hybrid Network-on-Chip architecture consisting of both wireline and wireless links that can seamlessly handle the varied traffic requirements that arise in heterogeneous manycore platforms. Second, we develop a machine learning-based multi-objective optimization (MOO) algorithm that learns an evaluation function and guides the search toward optimal designs in heterogeneous manycore systems. Finally, we propose architecture-independent imitation learning-based methodology for dynamic VFI control in heterogeneous manycore systems to address power and thermal issues.

MACHINE LEARNING-INSPIRED HIGH-PERFORMANCE AND ENERGY-EFFICIENT HETEROGENEOUS MANYCORE CHIP DESIGN

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