Wideband and Frequency Reconfigurable Millimeter-Wave Trancsceiver and Transceiver Sub-Block Design for the Multi-Band Wireless Network-on-Chip Architecture

Joseph Lee Baylon

To meet the ever-increasing demands of computational power, multi-core processor integration has risen to new heights. The wireless network-on-chip is an emerging technology which seeks to augment inter-core interconnects on multi-core processors with high throughput, low power wireless interconnects. While this technology offers improvements in power and latency for on-chip communication networks, additional innovation is required to realize these system level benefits. To meet the speed, efficiency, and latency demands of the wireless network-on-chip architecture, highly efficient, wideband mmWave transceivers and sub-blocks must be designed. This thesis presents the design and analysis of mmWave transceiver sub-blocks as well as integrated transmitter and receiver systems. Two high-performance signal source circuits suitable for the requirements of the multi-band wireless network-on-chip architecture are presented. The first simultaneously provides multiple harmonically related outputs for non-overlapping frequency bands of a multi-band wireless network architecture. The signal source circuit consists of a 28 GHz voltage-controlled oscillator circuit which leverages transformer feedback for high output swing and low phase noise under a low voltage power supply and an efficient harmonic generation architecture. The second signal source leverages a phase-switched dual-mode inductor which presents different inductance under different phase excitation. In addition, a V-band receiver is presented which leverages a current re-use active feed-forward and feedback architecture for wide bandwidth demodulation and minimal power overhead. Additionally, the inductorless bandwidth extension technique reduces silicon area overhead. A W-band receiver is also proposed which leverages a dual-noise-matched active gain-boosted common-gate LNA architecture which provides wide input matching with reduced power overhead. Finally, a W-band transmitter based on a wideband direct-modulated on-off-keying oscillator is presented. Resonant pulse-generation is used to increase the initial energy across the resonant tank, dramatically reducing start-up time. Furthermore, dual active- and passive- Gm-boosting and adaptive amplitude control for reduced start-up time and decreased steady-state power consumption further improve the bandwidth of the direct modulation oscillator. The circuits described above were fabricated in a 65 nm CMOS technology and demonstrate state-of-the-art performance with low power consumption and low area overhead. The innovations in this work facilitate the low-power mmWave transceivers required for the multi-band WiNoC architecture.

Wideband and Frequency Reconfigurable Millimeter-Wave Trancsceiver and Transceiver Sub-Block Design for the Multi-Band Wireless Network-on-Chip Architecture

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