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A DISTRIBUTED POWER ELECTRONICS ARCHITECTURE WITH SEQUENCED DC-DC REGULATION FOR RADAR IMAGING
Thesis

A DISTRIBUTED POWER ELECTRONICS ARCHITECTURE WITH SEQUENCED DC-DC REGULATION FOR RADAR IMAGING

Michael Larche
Master of Science (MS), Washington State University
2026
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Abstract

distributed power architecture power electronics
This thesis presents the design and implementation of a distributed power regulation system for a next generation radar imaging system, featuring local DCDC conversion, sequenced powerup and power down control, and real time power monitoring to support Radio Frequency (RF), digital, and data acquisition subsystems. The approach replaces traditional centralized regulation, used in prior systems, with a distributed architecture that routes a 48V system rail throughout the scanner and uses localized Power Distribution Boards (PDBs) to generate seven regulated voltages with precise timing enforced by cascaded LTC2928 sequencers. The design integrates high current LT8646S switching regulators, low noise linear and negative voltage regulators, and onboard supervisory monitoring, all implemented in a manufacturable PCB supported by a Debug-hat PCB that attaches to the PDB for visual indication of upset conditions. The system was verified using simulated loads, automated test instrumentation, oscilloscope timing capture, noise analysis, and thermal characterization, demonstrating reliable sequencing, stable regulation, and robust fault handling. This distributed architecture enabled modular subsystem testing and streamlined system integration, establishing a scalable and reliable power electronics framework for advanced RF imaging applications.

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