Thesis
Bridging the ultra-low power and high speed regions using a tunable body biasing approach
Washington State University
Master of Science (MS), Washington State University
2006
Handle:
https://hdl.handle.net/2376/462
Abstract
Interest in sub-threshold design has increased due to the emergence of systems that require ultra-low power. This approach sacrifices speed for power and creates a clear divide between designing for high speed and ultra-low power. There have not been efforts to bridge these operating regions and this study is a first step in that direction. To bridge the speed gap and potentially find an optimal operating point for both speed and power this work analyzes the suitability of logic styles for such operations. The static CMOS, pseudo-nMOS, pass-transistor, and domino logic styles are examined. Another key factor in bridging the speed gap is bulk control. The devices' bulk terminals have significant bearing on the performance. Controlling bulk terminals of CMOS devices to improve performance is central to this study. To enhance the operating speed of both sub-threshold and above threshold (superthreshold) circuits, a novel body biasing technique termed tunable body biasing (TBB) is introduced. TBB increases operating frequencies particularly in sub-threshold and shows no performance degradation in super-threshold, hence bridging of the speed gap. The feasibility of optimizing device sizes for both sub-threshold and super-threshold operation is considered. Device sizing for circuits in sub-threshold is examined with the view that these circuits could be optimized for sub-threshold but also operate effectively in super-threshold. In an effort to attain optimal performance, an operating region is identified in terms of the energy-delay product (EDP). A linear feedback shift register (LFSR) is chosen as a proof of concept circuit. An optimal operating region from 0.5 to 1.1 V for the LFSR is identified. An eight-bit LFSR with traditional body biasing operates in super-threshold (1.8V) at 1.43 GHz and dissipates 437.6 fJ per cycle. The TBB LFSR in sub-threshold (250 mV) operates at 222.2 kHz and dissipates 94 percent less energy. Additionally, the TBB LFSR operates 3.8 times faster than the traditional LFSR with a 33 percent smaller EDP at the cost of 2.5 times more energy. Results indicate the TBB approach for an inverter triples speed and reduces EDP by 60 percent while dissipating 28 percent more energy than a traditionally biased approach.
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Details
- Title
- Bridging the ultra-low power and high speed regions using a tunable body biasing approach
- Creators
- Brent C. Bero
- Contributors
- Jabulani Nyathi (Degree Supervisor)
- Awarding Institution
- Washington State University
- Academic Unit
- Electrical Engineering and Computer Science, School of
- Theses and Dissertations
- Master of Science (MS), Washington State University
- Publisher
- Washington State University; Pullman, Wash. :
- Identifiers
- 99900525064301842
- Language
- English
- Resource Type
- Thesis