Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation

Journal article

Brett Stanley Feero and Partha Pratim Pande

IEEE transactions on computers, Vol.58(1), pp.32-45

01/2009

Handle:

https://hdl.handle.net/2376/101808

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Title: Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation
Creators: Brett Stanley Feero
Partha Pratim Pande
Publication Details: IEEE transactions on computers, Vol.58(1), pp.32-45
Academic Unit: Electrical Engineering and Computer Science, School of
Identifiers: 99900546792601842
Language: English
Resource Type: Journal article